FEATURES OF THE CIRCUITRY OF OPERATIONAL AMPLIFIERS BASED ON COMPLEMENTARY FIELD-EFFECT TRANSISTORS WITH A CONTROL PN-JUNCTION
Abstract
The systematic component of the offset voltage (Voff) of two-stage BJT and CMOS operational
amplifiers (Op-Amps) with classical architecture significantly depends on the numerical
values (difference from unity) of the current transfer coefficient (Ki≈1) of the current mirrors (CM)
used. This parameter of CM is also influenced by the Earley stress of their dominant active components.
Current JFET mirrors are today a weak link in modern JFET analog circuitry and they
are impractical to use in the structure of JFET Op-Amps. The article posed and solved the problem
of the conditions for the elimination of CM in an Op-Amps based on field-effect transistors
with a control pn-junction for the case when it is necessary to obtain a small Voff. Variants of practical
circuits of input (InS) and intermediate (IntS) stages of microelectronic operational amplifiers
based on complementary field-effect transistors with a control pn-junction (CJFET) are proposed.
Their main feature is the absence of a current mirror, which, when implemented on a
CJFET, negatively affects the main parameters of the Op-Amps in terms of the systematic component
of the offset voltage, the attenuation coefficients of the input common-mode signal, and the
suppression of noise on the power buses. In this regard, InSs and IntSs circuits are promising,
which do not use this CJFET functional unit. The circuits of Op-Amps based on the developed InSs
with an open gain of more than 80 dB and a systematic component of the offset voltage within 300
μV with low current consumption in a static mode are presented. The relevance of the performed
studies lies in the need to develop the theory of designing high-precision JFET and CJFET IPmodules
for use in structures of low-noise analog interfaces of sensors of various physical quantities,
including those operating in severe operating conditions (exposure to low temperatures and
radiation) The proposed circuits can be implemented on wide-gap semiconductors (SiC JFET,
GaN JFET or GaAs JFET).
References
2nd ed., 819 p.
2. Bharath R.R., Gowda S.K. Design and Analysis of CMOS Two Stage OP-AMP in 180nm and
45nm Technology, IJERT, 2015, Vol. 4. No. 5, pp. 1100-1103.
3. Shukla N., Kaur J. Analysis of Two Stage CMOS Opamp using 90nm Technology, IJET,
2017, Vol. 9, pp. 66-72. DOI: 10.21817/ijet/2017/v9i3/170903S013.
4. Bryant J. Current-output circuit techniques add versatility to your analog toolbox, Analog
Dialogue, 2014, Vol. 48, pp. 2.
5. Bastan Y., Hamzehil E., Amiri P. Output impedance improvement of a low voltage low power
current mirror based on body driven technique, Microelectronics Journal, 2016, Vol. 56,
pp. 163-170.
6. Aggarwal B., Gupta M., Gupta A.K. A comparative study of various current mirror
configurations: Topologies and characteristics, Microelectronics Journal, 2016, Vol. 53,
pp. 134-155.
7. Snoeij M. A 36V 48MHz JFET-Input Bipolar Operational Amplifier with 150μV Maximum Offset
and Overload Supply Current Control, ESSCIRC 2018-IEEE 44th European Solid State Circuits
Conference (ESSCIRC). IEEE, 2018, pp. 290-293. DOI: 10.1109/ESSCIRC.2018.8494262.
8. Alnasser E. A Novel Low Output Offset Voltage Charge Amplifier for Piezoelectric Sensors,
IEEE Sensors Journal, 2020, Vol. 20, No. 10, pp. 5360-5367. DOI: 10.1109/JSEN.2020.2970839.
9. Bugakova A., Prokopenko N., Titov A. Design of Low-Temperature and Radiation-Hardened JFET
Direct Coupled Op-Amps without Current Mirrors, 2020 European Conference on Circuit Theory
and Design (ECCTD). IEEE, 2020, pp. 1-4. DOI: 10.1109/ECCTD49232.2020.9218291.
10. Dvornikov O.V., Dziatlau V.L., Tchekhovski V.A., Prokopenko N.N., Zhuk A.A., Bugakova A.V.
Modernization of Low-Temperature JFET Models Built into LTspice CAD Systems, Taking
into Account the Results of their Experimental Study, 2020 IEEE Latin America Electron Devices
Conference (LAEDC). IEEE. 202, pp. 1-4. DOI: 10.1109/LAEDC49063.2020.9073004.
11. Drozdov D.G., Prokopenko N.N., Savchenko E.M., Dukanov P.A., Rodin V.G., Grushin A.I.
Technological and devices modeling of complementary JFETs over a wide temperature range,
Microelectronics Journal, 2020, Vol. 105, pp. 104911.
12. Zhuk A.A., Savchenko E.M., Drozdov D.G., Budyakov P.S. Eksperimental'nye issledovaniya
osnovnykh parametrov CJFET tranzistorov s razlichnymi konstruktsiyami dlya zadach
proektirovaniya interfeysov datchikov pri vozdeystvii nizkikh temperatur i radiatsii [Experimental
studies of the main parameters of CJFET transistors with various designs for the problems
of designing sensor interfaces under the influence of low temperatures and radiation],
Fiziko-tekhnicheskie problemy v nauke, promyshlennosti i meditsine [Physical and technical
problems in science, industry and medicine], 2019, pp. 224-224.
13. Petrosyants K.O., Ismail-zade M.R., Sambursky L.M., Dvornikov O.V., Lvov B.G., Kharitonov I.A.
Automation of parameter extraction procedure for Si JFET SPICE model in the – 200…+ 110° C
temperature range, 2018 Moscow Workshop on Electronic and Networking Technologies
(MWENT). IEEE, 2018, pp. 1-5. DOI: 10.1109/MWENT.2018.8337212.
14. Sotskov D. I., Usachev N. A., Elesin V. V., Metelkin I. O., Zhidkov N. M., Nikiforov A. Y. Compact
Models for Radiation Hardening by Design of SiGe BiCMOS, GaAs and SOI CMOS Microwave
Circuits, 2021 International Siberian Conference on Control and Communications
(SIBCON). IEEE, 2021, pp. 1-5. DOI: 10.1109/MWENT.2018.8337212.
15. Llaria A., Jiménez J., Bidarte U., Curea O. Operational Amplifiers in Discrete Time Control
Systems: Influence of the Rail-to-Rail Feature on their Performance, WSEAS Transactions on
Electronics, 2008, Vol. 5, pp. 25-34.
16. Berry C.A., Walter D.J. Application of Operational Amplifiers, Fundamentals of Industrial
Electronics. CRC Press, 2018, pp. 5-1-5-30.
17. Dubovoy S.S., Shiksha I.O., Titov I.L. Kontrol' raboty elektricheskikh, elektronnykh ustanovok
i sistem upravleniya na primere sovremennykh elektronnykh usiliteley [Control of the operation
of electrical, electronic installations and control systems on the example of modern electronic
amplifiers], Sovremennye tendentsii prakticheskoy podgotovki v morskom obrazovanii
[Modern trends in practical training in maritime education], 2020, pp. 14-21.
18. Neudeck P., Spry D., Krasowski M., Chen L., Prokop N., Greer L., Chang, C. Progressing-190° C
to+ 500° C Durable SiC JFET ICs From MSI to LSI, 2020 IEEE International Electron Devices
Meeting (IEDM). IEEE, 2020, pp. 27.2. 1-27.2. 4. DOI: 10.1109/IEDM13553.2020.9371953.
19. Patterson R.L., Hammoud A., Dickman J.E., Gerber S., Elbuluk M. and Overton E. Electronics
for deep space cryogenic applications, Low Temperature Electronics, 2002: Proceedings of the
5th European Workshop on, 2002, pp. 207-210.
20. Vikulin I., Gorbachev V., Gorbacheva A., Krasova V., Litvinenko V. Radiation resistant FETbased
Temperature Sensor for End Devices of IoT, 2019 3rd International Conference on Advanced
Information and Communications Technologies (AICT). IEEE. 2019, pp. 272-277.
DOI: 10.1109/AIACT.2019.8847905.
21. Bakerenkov A., Pershenkov V., Felitsyn V., Rodin A., Telets V., Belyakov V., Zhukov A.,
Gluhov N. Correlation between Temperature and Dose Rate Dependences of Input Bias Current
Degradation in Bipolar Operational Amplifiers, 2019 IEEE 31st International Conference
on Microelectronics (MIEL). IEEE. 2019, pp. 341-344. DOI: 10.1109/MIEL.2019.8889589.
