THE MOTIVATION OF THE CHOICE OF THE TRANSFORMATION LEVEL NUMBER OF THE VOLTAGE IN STRUCTURE POWER SOURCE FOR SYSTEMS ON CRYSTAL
Abstract
The Traditional structure power source has three levels: rectifier; the patch of the factor to powers (KKM); pulsed insulated DC/DC source. Such structure can be not used in power source for systems on crystal (SoC) on two main reasons:1) in SNK it is impossible place the electrolytic capacitors (EK), as well as ceramic capacitors (KK) to big capacity; 2) appear the difficulties at realization of the pulsed radio-frequency transformer DC/DC source with re-quired turn ratio. In work is shown that introduction to structure fourth level on base linear stabilizer without output electrolytic capacitor (NoCap) avoids the first reason, but require-ments on turn ratio remain former. This is connected with that that stabilizers of the type NoCap have a non-standard input voltages, which little differ from output (the difference forms 100–200 mB). In work is given motivation to need of the introduction fifth and sixth level of the structure in the manner of pulsed DC/DC sources. The Main part DC/DC source fifth level can take seats with SNK, but required for his work choke will be an outboard element SoC. In arti-cle is shown that efficient use stabilizers type NoCap possible only when performing it is enough hard conditions on stability their input voltages.
References
2. Chenchang Zhan, Wing-Hung Ki. Output-Capacitor-Free Adaptively Biased Low-Dropout Regulator for System-on-Chips, IEEE Transactions on circuits and sestems–I, May 2010, Vol. 57, No. 5.
3. Chu Y.C. and Chang-Chien L.R. Digitally controlled low-dropout regulator with fast-transient and autotuning algorithms, IEEE Transactions on Power Electronics, Sept. 2013, Vol. 28, No. 9, pp. 4308-4317.
4. Romadina I. LDO – stabilizatory napryazheniya ON Semi. Vybor i primenenie [LDO-voltage stabilizers on Semi. Selection and application], Elektronnye komponenty [Electronic compo-nent], 2011, No. 2.
5. Samoylov L.K. Istochniki pitaniya. Ustroystva formirovaniya sluzhebnogo napryazheniya. Deponirovannaya rukopis' № 1066-V2006 16.08.2006 [Power supply. The device of the for-mation of the utility voltage. Deposited manuscript No. 1066-B2006 16.08.2006].
6. Samoylov L., Seredzhinov R. Analiz protsessov v istochnikakh sluzhebnogo pitaniya za schet vykhodnykh kaskadov dvukhtaktnykh pryamokhodovykh impul'snykh preobrazovateley [Analysis of processes in service power sources due to output stages of push-pull forward pulse converters], Silovaya elektronika [Power electronics], 2008, No. 16, pp. 80-84.
7. Leung W.Y., Man T.Y., Chan W.T., and Chan M. A high precision, output-capacitor-free low-dropout regulator for system-on-chip design, IEEE International Symp. on Circuits and Sys-tems, May 2008, pp. 2242-2245.
8. Shi C., Walker B.C., Zeise E., Hu B., and McAllister G.H. A highly integrated power manage-ment IC for advanced mobile applications, IEEE J. Solid-State Circuits, Aug. 2007, Vol. 42, No. 8, pp. 1723-1731.
9. Ming, X., Li, Q., Kun Zhou, Z., et al. An ultrafast adaptively biased capacitorless LDO with dynamic charging control, IEEE Trans. Circuits Syst. II, Exp. Briefs, Jan. 2012, Vol. 59, No. 1, pp. 40-44.
10. Aminzaden H., Serdijn W. Low-dropout regulators: Hybrid-cascode compensation to improve stability in nano-scale CMOS technologies, In: Proc. IEEE Int. Symp. on Circuits and Systems, May 2011, pp. 2293-2296.
11. Robert J. Milliken, Jose Silva-Martнnez. Full On-Chip CMOS Low-Dropout Voltage Regulator, IEEE transactions on circuits and systems–I: Regular papers, September 2007, Vol. 54, No. 9.
12. Patounakis G., Li Y.W., and Shepard K. A fully integrated on-chip DC-DC conversion and power management system, IEEE J. Solid-State Circuits, Mar. 2004, Vol. 39, No. 3, pp. 443-451.
13. Leung K.N. and Mok P.K.T. A capacitor-free CMOS low-dropout regulator with damping-factor-control frequency, IEEE J. Solid-State Circuits, Oct. 2003, Vol. 37, No. 10, pp. 1691-1701.
14. Gupta V., Rincon-Mora G., and Raha P. Analysis and design of monolithic, high PSR, linear regulators for SoC applications, in Proc. IEEE Int. Syst. Chip Conf. , Santa Clara, CA, Sep. 2004, pp. 311-315.
15. Rincon-Mora G.A. and Allen P.E. A low-voltage, low quiescent current, low drop-out regula-tor, IEEE J. Solid-State Circuits, Jan. 1998, Vol. 33, No. 1, pp. 36-44.
16. Man T.Y., Leung K.N., Leung C.Y., Mok P.K.T., and Chan M. Development of single-transistor-control LDO based on flipped voltage follower for SoC, IEEE Tran. Circuits and Systems I, Reg. Papers, Jun. 2008, Vol. 55, pp. 1392-1401.
17. Lau S-K., Mok P.K.T. and Leung K.N. A low-dropout regulator for SoC with Q-reduction, IEEE J. Solid-State Circuits, Mar. 2007, Vol. 42, No. 3, pp. 658-664.
18. Leung W.Y., Man T.Y., Chan W.T., and Chan M. A high precision, output-capacitor-free low-dropout regulator for system-on-chip design, IEEE International Symposium on Circuits and Systems, May 2008, pp. 2242-2245.
19. Hoon S.K., Chen S., Maloberti F., Chen J., and Aravind B. A Low Noise, High Power Supply Rejection Low Dropout Regulator for Wireless System-on-Chip Applications, in Proc.IEEE Custom Integr.Circuits Conf., Sept. 2005, pp. 759-762.
20. Peter Hazucha, Tanay Karnik, Bradley A. Bloechel, Colleen Parsons, David Finan, and Shekhar Borkar. Area-Efficient Linear Regulator With Ultra-Fast Load Regulation, IEEE J. Solid-State Circuits, April 2005, Vol. 40, pp. 933-940.
21. Leung K.N. and Mok P.K.T. Analysis of multistage amplifier–Frequency compensation, IEEE Trans on Circuits Syst. I, Sept. 2001, Vol. 48, pp. 1041-1056.
22. Leung K.N. and Mok P.K.T. A capacitor-free CMOS low-dropout regulator with damping-factor-control frequency compensation, IEEE Journal of Solid-State Circuits, 2003, No. 38 (10), pp. 1691-1702.
