LOGIC CELL FOR VLSI BASED ON FIELD-EFFECT TRANSISTORS WITH P-N JUNCTIONS
Abstract
In the 80s of the last century, integrated injection logic (I2L) was widely used as an element base. Somewhat later, injection-field logic (IPL) appeared in the development of I2L capabilities for building VLSI. Thanks to the use of a field-effect transistor as a key element of the inverter, in this element basis it was possible to significantly reduce an important indicator for VLSI – power consumption - reaching the peak-watt range. An even greater reduction in power consumption can be achieved by using two field-effect transistors in the inverter unit cell, which is proposed in this paper. This element basis is proposed to be called field-field logic, or in the future P2L. To reduce the dimensions of the P2L cell, field-effect transistors, both key and load, are made with a vertical channel. In addition, to ensure a positive supply voltage, an n-channel transistor is used as a key one, and a p–channel transistor is used as a load one. Both transistors are normally closed, i.e. closed at zero gate voltage. Topological variants of P2L-cell execution from geometry with annular gates to geometry with linear gates proposed by the author earlier are considered. The topological norms adopted in the consideration are the norms of 50 nm. The power consumption in this element basis is reduced by about two times compared to the IPL, due to the fact that the current flows through the load transistors in the inverter chain through one inverter, as well as through the key ones. The technological process of manufacturing a P2L cell is considered, the profiles of the distribution of impurities in depth are calculated. The manufacturing process is designed taking into account the fact that the load p-channel transistor must be made in an insulated pocket using full dielectric insulation technology. The technological modes of manufacturing the P2L cell are given. The proposed design and technological variant of the P2L cell can be recommended for the creation of VLSI with low power consumption
References
1. Avaev N.A., Dulin V.N., Naumov Yu.E. Bol'shie integral'nye skhemy s inzhektsionnym
pitaniem [Large injection-powered integrated circuits]. Moscow: Sov.radio, 1977, 248 p.
2. Barinov V.V., Kremlev V.Ya., Moshkin V.I., Orlikovskiy A.A. Integral'nye skhemy s
inzhektsionnym pitaniem [Integrated circuits with injection power supply], Zarubezhnaya
elektronnaya tekhnika [Foreign electronic equipment], 1973, No. 19, pp. 3.
3. Kremlev V.Ya., Moshkin V.I. Funktsional'no-integrirovannye elementy BIS [Functionally integrated
elements of LSI], Elektronnaya promyshlennost' [Electronic industry], 1976, No. 5, pp.
50-61.
4. Baranov L.I. O koeffitsiente usileniya polevogo tranzistora so smeshcheniem zatvora v
pryamom napravlenii [On the gain factor of the field transistor with forward shift of the gate],
Radiotekhnika i elektronika [Radio engineering and electronics], 1975, Vol. 20, No. 6,
pp. 1323-1325.
5. Gritsaenko P.G. Konstruktivno-tekhnologicheskiy variant dlya SBIS na osnove inzhektsionnopolevoy
logiki [Constructive and technological variant for VLSI based on injection-field logic],
Izvestiya YuFU. Tekhnicheskie nauki [Izvestiya SFedU. Engineering Sciences], 2019,
No. 5 (207), pp. 175-183.
6. Batalov B.V, Kremlev V.Ya., D'yakonov V.M. Modelirovanie raboty polevogo tranzistora kak
elementa inzhektsionno-polevoy logiki [Simulation of field transistor operation as an element
of injection-field logic], Mikroelektronika [Microelectronics], 1979, Vol. 8, Issue 1, pp. 34-43.
7. D'yakonov V.M., Kremlev V.Ya. Modelirovanie elementov inzhektsionno-polevykh
logicheskikh mikroskhem [Modeling of Elements of Injection Field Logic Chips],
Elektronnaya promyshlennost' [Electronic Industry], 1979, Issue 4 (76), pp. 286-288.
8. Inzhektsionno-polevaya struktura dlya logicheskikh integral'nykh skhem: Avt. svidetel'stvo
№ 764567 (SSSR) [Injection field structure for logic integrated circuits: Author 's certificate
No. 764567 (USSR). Published in Bulletin No. 34, 1980].
9. Kremlev V.Ya. Staticheskie kharakteristiki elementov SBIS inzhektsionno-polevoy logiki
[Static characteristics of VLSI elements of injection-field logic], V sb. «Tekhnologiya,
proektirovanie i nadezhnost' integral'nykh poluprovodnikovykh skhem» [In coll. "Technology,
design and reliability of integrated semiconductor circuits"]. Moscow: MIET, 1988, 122 p.
10. Kremlev V.Ya., Gritsaenko P.G. Issledovanie struktury na vzaimodopolnyayushchikh bipolyarnykh
tranzistorakh [Study of the structure of complementary bipolar transistors], Izvestiya VUZov.
Radioelektronika [Proceedings of the Universities. Radioelectronics], 1988, No. 3.
11. Garitsyn A.G., Gritsaenko P.G., Levin A.Yu., Tarasov A.O. Polevoy tranzistor s
samosovmeshchennym vertikal'nym kanalom [Field-effect transistor with self-displaced vertical
channel], Elektronnaya tekhnika. Seriya 2 «Poluprovodnikovye pribory» [Electron Technics.
Series 2 “Semiconductor devices”], 1981, Issue 6 (148).
12. Konstruktivno-tekhnologicheskie varianty ispolneniya bipolyarnogo i polevogo tranzistorov v
odnom kristalle. Inzhektsionno-polevaya logika. Belorusskiy gosudarstvennyy universitet
informatiki i radioelektroniki. Kafedra RES. Referat na temu: «Konstruktivno-tekhnologicheskie
varianty ispolneniya bipolyarnogo i polevogo tranzistorov v odnom kristalle. Inzhektsionnopolevaya
logika» [Design and technological variants of bipolar and field-effect transistors in one
crystal. Injection-field logic. Belarusian State University of Informatics and Radioelectronics.
Department of RES. Abstract on the topic: «Design and technological variants of bipolar and
field-effect transistors in one crystal. Injection-field logic»]. Minsk, 2009.
13. Gritsaenko P.G., Kremlev V.Ya., Gadkov S.M. Issledovanie staticheskikh parametrov
IPL-invertora [Study of static parameters of IPL inverter]. Dep. v mezhvedomstv. refer. sb.
«Tekhnika, tekhnologiya i ekonomika». Seriya ER [Deposited in the interagency abstract collection
Technique, «Technology and Economics». Series ER]. Taganrog, 1981, No. 27, 5 p.
14. Kremlev V.Ya. Gritsaenko P.G. Dostizhenie pikovattnoy moshchnosti v inzhektsionno-polevoy
logike [Achievement of peak power in injection-field logic], Izvestiya vuzov. Radioelektronika
[News of Higher Educational USSR. Radioelectronics], 1981, Vol. XXIV, No. 8, pp. 96-97.
15. Makoviychuk M.I., Parshin E.O., Rekshinskiy V.A. Fizicheskie osnovy tekhnologii KNIstruktur,
formiruemykh metodom ionno-luchevogo sinteza [The physical basis of the technology
of COI structures formed by the method of ion-beam synthesis], Izvestiya vuzov.
Elektronika [News of Higher Educational USSR. Electronics], 1998, No. 5, pp. 10-16.
16. Pirs K., Adams A., Kats L., Tsay Dzh., Seydel T., Makgillis D. Tekhnologiya SBIS
[Tekhnologiya SBIS]: In 2-nd book, ed. by S. Zi: transl. from engl. Moscow: Mir: Redaktsiya
literatury po novoy tekhnike, 1986.
17. Rudakov V.I., Denisenko Yu.I., Mochalov B.V. Nizkotemperaturnyy otzhig SIMOX-struktur v
neodnorodnom temperaturnom pole [Low-temperature annealing of SIMOX structures in an
inhomogeneous temperature field], Mikroelektronika [Microelectronics], 2000, Vol. 29, No. 5,
pp. 367-373.
18. Krivilevich S.A., Makoviychuk M.I., Parshin E.O. Ionnyy sintez struktur kremniy-naizolyatore.
Sovremennoe sostoyanie, novye podkhody i perspektivy [Ion synthesis of siliconon-
insulator structures. Current state, new approaches and prospects], Mikroelektronika [Microelectronics],
1999, Vol. 28, No. 5, pp. 363-369.
19. Korolev M.A., Krupkina T.Yu., Reveleva M.A. Tekhnologiya, konstruktsii i metody
modelirovaniya kremnievykh integral'nykh skhem [Technology, designs and methods of modeling
silicon integrated circuits], under the general ed. chl.-corr. RAS prof. Yu.A. Chaplygina.
Moscow: Binom. Laboratoriya znaniy, 2015, 400 p.
20. Svetlichnyy A.M., Naumchenko A.S., Svetlichnaya L.A., Zhityaev I.L. Metody izolyatsii
elementov mikro- i nanostruktur: ucheb. posobie [Methods of isolation of elements of microand
nanostructures: textbook]. Rostov-on-Don: Izd-vo YuFU, 2014, 56 p.
