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• DETECTION OF CYBER INTRUSIONS BASED ON NETWORK TRAFFIC AND USER BEHAVIOR USING THE UNSW-NB15 DATASET

  V. А. Chastikova , К.V. Kozachek , Е.S. Korobskaya , V. P. Kravtsov

  229-243

  2025-11-10

  Abstract ▼

  The article focuses on the study of user behavior and the creation of behavioral models. This helps to improve the accuracy of anomaly detection and quickly identify non-standard network activity.
  The purpose of this study is to compare the effectiveness of two machine learning models – the multilayer perceptron (MLP) and the Random Forest algorithm – for detecting cyber intrusions based on the analysis of network traffic and user behavior. Behavioral models make it possible to detect deviations from normal user activity and network interactions, which significantly increases the completeness of cyber intrusion detection. The study used the UNSW-NB15 dataset, which includes current types of attacks and characteristics of both network traffic and user activity. Prior to the implementation of the models, preliminary data processing, feature selection, normalization and coding of categorical features were carried out.
  The models were evaluated using various metrics such as accuracy, recall, AUC-ROC, precision,
  F1-score, and others. The results of the study showed that the Random Forest algorithm provides high classification accuracy (95%), and the multilayer perceptron (MLP), in turn, achieved outstanding results in AUC (0.9830) and accuracy (precision, 0.9869). The paper presents an analysis and characterization of methods for analyzing user behavior and classifying network traffic, a comparison of data sets for intrusion detection systems (IDS), and practical recommendations for choosing models depending on operating conditions. The results of the study can be useful in the development of adaptive protection systems that combine high accuracy and speed

• DESIGNING MLP AND CNN NEURAL NETWORK MODULES ON FPGA FOR IMAGE CLASSIFICATION TASKS

  E. V. Melnik , D.Е. Blokh , А.I. Bezmeltsev , V.S. Panishchev , S.N. Poltoratsky

  214-229

  2025-11-10

  Abstract ▼

  Relevance. The development of machine learning methods and neural network architectures, as well as their spread into various industrial sectors, determine the relevance of solving problems related to their hardware implementation. The use of programmable logic integrated circuits in this area will increase data processing speed and the adaptability of the implemented algorithms. However, designing neural network architectures on programmable logic integrated circuits is associated with a number of methodological and technical difficulties, including the optimization of parallel computing, hardware resource management, and ensuring operation under conditions of limited computing resources. The purpose of this work is to analyze and compare two neural network architectures, the multilayer perceptron (MLP) and the convolutional neural network (CNN), in the context of their hardware implementation on programmable logic integrated circuits (PLICs). Particular attention is paid to the trade-off between classification accuracy and the efficient use of limited FPGA hardware resources. Research methods.
  To achieve the goal, two modules were developed and simulated on a Virtex 7 FPGA, a perceptron and a convolutional module. The MNIST dataset, reduced to 20×20 pixels, was used. The implementation included quantizing parameters to a fixed 16:16 format, optimizing hyperparameters, using tabular computations for nonlinear functions, and evaluating FPGA resource usage. Results and discussions.
  MLP achieved 93% accuracy using 11% of logic elements, while CNN achieved 98% accuracy but required significantly more resources. The use of internal buffers to store intermediate data in CNN resulted in exceeding the allowable resources. The forced transition to external memory increased delays and the number of I/O ports. Conclusions. The study showed that the choice of architecture depends on priorities: CNN provides better accuracy but is less resource-efficient. For embedded systems with memory and power consumption constraints, a simplified MLP implementation is preferable. The main problems remain the lack of internal memory and the high resource intensity of operations, which requires further research in the field of hardware optimization and adaptive computation control