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FEATURES OF THE CIRCUITRY OF OPERATIONAL AMPLIFIERS BASED ON COMPLEMENTARY FIELD-EFFECT TRANSISTORS WITH A CONTROL PN-JUNCTION
N.N. Prokopenko, V.Е. Chumakov, А.V. Bugakova, А.Е. Titov126-1352025-08-01Abstract ▼The systematic component of the offset voltage (Voff) of two-stage BJT and CMOS operational
amplifiers (Op-Amps) with classical architecture significantly depends on the numerical
values (difference from unity) of the current transfer coefficient (Ki≈1) of the current mirrors (CM)
used. This parameter of CM is also influenced by the Earley stress of their dominant active components.
Current JFET mirrors are today a weak link in modern JFET analog circuitry and they
are impractical to use in the structure of JFET Op-Amps. The article posed and solved the problem
of the conditions for the elimination of CM in an Op-Amps based on field-effect transistors
with a control pn-junction for the case when it is necessary to obtain a small Voff. Variants of practical
circuits of input (InS) and intermediate (IntS) stages of microelectronic operational amplifiers
based on complementary field-effect transistors with a control pn-junction (CJFET) are proposed.
Their main feature is the absence of a current mirror, which, when implemented on a
CJFET, negatively affects the main parameters of the Op-Amps in terms of the systematic component
of the offset voltage, the attenuation coefficients of the input common-mode signal, and the
suppression of noise on the power buses. In this regard, InSs and IntSs circuits are promising,
which do not use this CJFET functional unit. The circuits of Op-Amps based on the developed InSs
with an open gain of more than 80 dB and a systematic component of the offset voltage within 300
μV with low current consumption in a static mode are presented. The relevance of the performed
studies lies in the need to develop the theory of designing high-precision JFET and CJFET IPmodules
for use in structures of low-noise analog interfaces of sensors of various physical quantities,
including those operating in severe operating conditions (exposure to low temperatures and
radiation) The proposed circuits can be implemented on wide-gap semiconductors (SiC JFET,
GaN JFET or GaAs JFET). -
FUNDAMENTALS OF DESIGNING HIGH-TEMPERATURE ANALOGIC MICROSCIRCUIT ON WIDE-GAP SEMICONDUCTORS (REVIEW)
А.V. Bugakova, D.V. Kuznetsov, V. Е. Chumakov, D.V. Kleimenkin, М. А. Sergeenko2023-10-23Abstract ▼An analytical review of promising technological processes for high-temperature analog microcircuits,
which are in demand in space, aviation and automotive instrumentation, petrochemical
industry, electric power industry, military electronics, medicine, etc., is presented. The problems
of designing microcircuits of this class based on wide-gap semiconductors (silicon carbide
(SiC), gallium nitride (GaN), gallium arsenide (GaAs)) that provide a wide range of operating
temperatures (-200°С…+500°С). Currently, "low-current" circuitry based on SiC, GaN, GaAs
wide-gap semiconductors for operation at high temperatures is extremely undeveloped, which
does not allow designing new-generation analog products in the interests of Russian enterprises.
Today, many topical issues of SiC, GaN, GaAs high-temperature circuitry and dynamics have not
been resolved. Therefore, it is necessary to study structural and technological solutions, as well as
heat removal. In this regard, the article analyzes the problems of designing microcircuits of these
classes. At the same time, one should take into account the limitations of technological processes, which, in many cases, allow creating only the same type of active elements, which makes it difficult
to build microcircuits. The relevance of the above studies is related to the problems of import substitution
under the conditions of sanctions, when the purchase of an electronic component base for
responsible use from foreign firms becomes unavailable. Russian recommendations are needed on
the development of rules for designing analog interface microcircuits (operational and differential
difference amplifiers, transimpedance and charge-sensitive amplifiers, compensation voltage stabilizers
and buffer amplifiers, current conveyors, etc.) for the tasks of processing signals from
sensors of physical quantities in the high temperature range (+150 °С ... +500°С). -
COMPARATIVE ANALYSIS OF TWO- AND SINGLE-STAGE BJT-JFET OPERATIONAL AMPLIFIERS
О.V. Dvornikov, V. А. Tchekhovski, А.V. Kunts, N.N. Prokopenko, V.E. Chumakov2023-10-23Abstract ▼Operational amplifiers with different number of amplifying stages realized on complementary
bipolar transistors and input field-effect transistors, with control p-n junction are considered.
For the elements of the master slice array MH2XA031 the original electrical schematics of three
amplifier variants (OAmp11.3, OAmp12, OAmp14) containing the same static mode bias block
and output stage are given. The OApm11.3 circuit contains an input differential stage in the form
of a " folded" cascode on p-JFETs and an intermediate amplifier stage on bipolar transistors. The
operational amplifier OAmp12 includes an input dual source-repeater on p-JFETs and an " folded"
cascode on complementary bipolar transistors. The OAmp14 circuit is realized on the basis of
dual source repeaters on p-JFETs and a high-precision voltage-to-current converter on complementary
bipolar transistors in the intermediate stages. The presented electrical circuits are characterized
by low zero offset voltage, relatively high voltage gain and can be used for application in special and dual-purpose equipment. When designing the Op-Amp circuits on the master slice array
MH2XA031 the search for a compromise combination of input current, noise level and voltage gain
was carried out, and special attention was paid to the choice of the operating mode of the input
JFETs. Single amplifier stage circuits, which typically provide lower noise, simple frequency correction,
and larger bandwidth, were investigated. For an adequate comparison of the developed amplifiers
the modeling of their static and dynamic parameters at the same operating mode of identical
circuit elements has been performed, which allowed to formulate recommendations on circuit synthesis
of operational amplifiers depending on the required combination of parameters. When optimizing
the operating mode of the transistors of the " folded" cascode with input JFETs, the recommendations
consisting in the necessity to increase the steepness of the input JFET transistors and the voltage
drop across the emitter resistors of the reference current sources were used.








