IMPROVING REAL PERFORMANCE OF RCS WHEN SOLVING DIGITAL IMAGE PROCESSING TASKS USING FAST FOURIER TRANSFORM
Keywords:
Digital signal processing, digital image processing, fast Fourier transform, reconfigurable computing systems, fixed point, bit scalingAbstract
The article discusses the issues of digital processing of images of large dimensions in real
time using reconfigurable computer systems (RCS) on the base of programmable logic arrays
(FPGAs). RCS belongs to the class of high-performance multiprocessor computing systems that
have a programmable architecture that allows configuring the structure of a computer system and
optimally adjusting it to the algorithms of the solved task. At the same time, optimization of the
computational structure of the task reduced to the development and implementation of parallel
algorithms corresponding to the specifics of the RCS architecture used. All this allows to effectively
using RCS to solve a wide class of digital signal processing tasks. Offered are methods of increasing
specific and real performance of RCS when solving digital image processing problems
using fast Fourier transform (FFT). Using the example of a procedure for filtering images in the
frequency domain, the main computational steps and methods for optimizing them based on the
properties of the FFT algorithm are discussed. The use of optimization allows to significantly reducing
both the amount of computation and the amount of hardware resources of the FPGA andincrease the performance of RCS for image processing tasks. The FPGA resources freed because
of the optimization of the computational structure can be uses to further parallelize calculations
and accelerate the processing of incoming data. The advantages of presenting data in fixed-point
format when performing calculations on RCS are showed. The use of a fixed point allows not only
to increase the specific and real performance of a computer system compared to a floating point
due to the properties of the format, but also to use arbitrary data bit capacity, which is relevant for
most digital signal processing tasks. The solution to the problem of overflow of the bit grid when
using the fixed-point format using data bit scaling is discussed.








