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• SIGE BICMOS OUTPUT STAGES OF HIGH-TEMPERATURE OPERATIONAL AMPLIFIERS

  А.А. Zhuk , D. V. Kleimenkin , N.N. Prokopenko

  143-159

  2025-11-10

  Abstract ▼

  Development and design of silicon-germanium (SiGe) analog functional units (operational amplifiers, output stages, etc.) is one of the urgent tasks in modern microelectronics. The use of the combined technological process of SiGe BiCMOS makes it possible to combine in a single integrated circuit the advantages of complementary CMOS triansistors (low power consumption and high integration density) and bipolar heterojunction transistors (HBT) n-p-n type (the ability to operate at high frequencies, low power consumption and, as a result, low intrinsic heat dissipation, high gain, high performance, increased reliability, relatively low cost). To create a micro-power analog component base operating at high temperatures (up to + 250 degrees Celsius), it is necessary to develop special SiGe BiCMOS circuit solutions that take into account the process limitations on the use of certain types of transistors. Four modifications of buffer amplifiers for application as output stages of operational amplifiers, which are oriented to SiGe BiCMOS technological process, are investigated. A program for cataloging and visualization of the considered circuits is developed, which differ from each other by the values of input and output resistances, static current consumption, circuitry of static mode establishment circuits, maximum amplitudes of positive and negative output voltages, etc. Examples of computer simulation of static modes and amplitude characteristics in the Cadence electronics and microelectronics design environment at two temperatures of + 27 and + 250 degrees Celsius are given. The proposed circuit design solutions are recommended for practical use in microelectronic devices operating at elevated temperatures

• CIRCUIT DESIGN METHOD FOR IMPROVING LARGE-SIGNAL SPEED OF CLASSICAL OUTPUT STAGES OF OPERATIONAL AMPLIFIERS USING BJT (CMOS, JFET OR SIGE) TRANSISTORS

  А.А. Zhuk , А.I. Gavlitskiy , N.N. Prokopenko

  265-277

  2026-07-07

  Abstract ▼

  A significant drawback of classical output stages of microelectronic operational amplifiers, which today are implemented based on BJTs (bipolar junction transistors), CMOS (complementary metal-oxide-semiconductor transistors), or JFETs (junction field-effect transistors), including when these technologies are used together, is that they exhibit a relatively low output voltage slew rate under the influence of large-amplitude pulsed input signals. This undesirable effect is mainly caused by the presence of parasitic capacitances inherent in the reference current source circuits employed and in their output transistors. This paper discusses an original and effective circuit design technique that provides forced recharging of parasitic capacitances, which is used in output stages implemented in numerous patents of the world’s leading microelectronic companies. The introduction of a special differentiating transient correction circuit into the original schematics, as well as various options for its practical implementation, are considered for the first time. The circuitry of such output stages is protected by a patent of the Russian Federation. Four different modifications of buffer amplifiers have been developed and investigated, which are intended for use in modern technological processes implemented with silicon BJT or CMOS transistors, as well as with gallium arsenide n-JFET and p-n-p bipolar transistors. Examples of computer simulation of DC operating modes, as well as transient processes, are presented, which clearly demonstrate a significant increase in the maximum output voltage slew rate (by more than one to three orders of magnitude). The proposed advanced circuit solutions for GaAs transistors are recommended for practical application in microelectronic devices designed for operation under elevated temperature conditions.

• DISCRETE-ANALOGUE FILTER OF THE SECOND ORDER ON SWITCHED CAPACITORS WITH TUNING OF POLE FREQUENCY BY DIGITAL POTENTIOMETER

  D.Y. Denisenko , N.N. Prokopenko , Y.I. Ivanov , D.V. Kuznetsov

  179-189

  2025-11-10

  Abstract ▼

  A discrete-analogue filter of the second order on two frequency-switching capacitors is developed and investigated. The proposed circuit contains two inputs (In_LPF_HPF, In_BPF_NPF) and four outputs (Out_LPF, Out_BPF, Out_HPF, Out_NPF). The filter type (numerator of the transfer function) is determined by connecting a signal source to the corresponding input of the circuit and taking a signal from the corresponding output. The pole attenuation depends on the resistance of a single resistor R5, which does not affect the other parameters. Therefore, the pole attenuation can be tuned using this resistor. To set the passband gain at a given level, it is appropriate to use resistor R1 in the LPF and HPF, and resistor R2 for the BPF and NPF. Changing these resistors will not cause changes in other parameters of the filter circuit. It is established that the pole frequency depends on the resistance of the resistor R8 or digital potentiometer Kdp (Kf), the transmission coefficient of which can be changed by changing the binary digital code Kf, fed to its control inputs, and the other parameters of the filter link do not depend on them, so by changing the resistance of this resistor or the transmission coefficient of the digital potentiometer the pole frequency can be tuned in a wide range while preserving other parameters. Computer modelling of the investigated discrete-analogue filter is performed in Micro-Cap environment. The sequences of pulses controlling electronic keys are given. Graphs of output voltages at the circuit outputs (Out_LPF, Out_BPF, Out_HPF, Out_NPF) are shown. The application of a digital potentiometer in the filter circuit is extremely promising in the construction of adaptive signal processing systems.

• FEATURES OF THE CIRCUITRY OF OPERATIONAL AMPLIFIERS BASED ON COMPLEMENTARY FIELD-EFFECT TRANSISTORS WITH A CONTROL PN-JUNCTION

  N.N. Prokopenko, V.Е. Chumakov, А.V. Bugakova, А.Е. Titov

  126-135

  2025-08-01

  Abstract ▼

  The systematic component of the offset voltage (Voff) of two-stage BJT and CMOS operational
  amplifiers (Op-Amps) with classical architecture significantly depends on the numerical
  values (difference from unity) of the current transfer coefficient (Ki≈1) of the current mirrors (CM)
  used. This parameter of CM is also influenced by the Earley stress of their dominant active components.
  Current JFET mirrors are today a weak link in modern JFET analog circuitry and they
  are impractical to use in the structure of JFET Op-Amps. The article posed and solved the problem
  of the conditions for the elimination of CM in an Op-Amps based on field-effect transistors
  with a control pn-junction for the case when it is necessary to obtain a small Voff. Variants of practical
  circuits of input (InS) and intermediate (IntS) stages of microelectronic operational amplifiers
  based on complementary field-effect transistors with a control pn-junction (CJFET) are proposed.
  Their main feature is the absence of a current mirror, which, when implemented on a
  CJFET, negatively affects the main parameters of the Op-Amps in terms of the systematic component
  of the offset voltage, the attenuation coefficients of the input common-mode signal, and the
  suppression of noise on the power buses. In this regard, InSs and IntSs circuits are promising,
  which do not use this CJFET functional unit. The circuits of Op-Amps based on the developed InSs
  with an open gain of more than 80 dB and a systematic component of the offset voltage within 300
  μV with low current consumption in a static mode are presented. The relevance of the performed
  studies lies in the need to develop the theory of designing high-precision JFET and CJFET IPmodules
  for use in structures of low-noise analog interfaces of sensors of various physical quantities,
  including those operating in severe operating conditions (exposure to low temperatures and
  radiation) The proposed circuits can be implemented on wide-gap semiconductors (SiC JFET,
  GaN JFET or GaAs JFET).