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MODIFICATION OF THE IMPLEMENTATION OF THE JACOBI METHOD IN SIMULATING SUPERDIFFUSION OF RADON ON RECONFIGURABLE COMPUTER SYSTEMS
М.D. Chekina198-2062021-10-05Abstract ▼When studying natural objects, the problem of modeling complex systems with a structure that cannot be described by means of Euclidean geometry tools often arises, therefore, fractal geometry and the corresponding mathematical apparatus are used to represent them. So the model of radon transport in an inhomogeneous medium, using superdiffusion, displays real data more accurately than the classical one. An increase in the concentration of radon in the air is one of the signs of an approaching earthquake, which makes it necessary to simulate the propagation of this radioactive inert gas in real time. Reconfigurable computing systems have great potential for solv-ing problems in real time, but the currently existing means for solving systems of linear equations have low efficiency due to the irregular structure of matrices obtained by discretizing the radon superdiffusion model using adaptive grids. The basic subgraph of the Jacobi method is trans-formed as follows: the input data is vectorized, the structure of the frame in which the value of one unknown is calculated is divided into several microframes, parallelizing the calculations in the first microframe, where the sum of the products of the matrix coefficients and the values of the unknowns from the previous iteration is performed. The results obtained are buffered for subse-quent delivery to the second microframe, where the final processing and output of the iteration result takes place. The described approach allows to reduce equipment downtime when solving a system of linear equations with sparse irregular matrices, and gives a speed gain by 5–15 times in comparison with existing methods for solving linear system on reconfigurable computing systems
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THE PARALLEL-PIPELINED IMPLEMENTATION OF THE FRACTAL IMAGE COMPRESSION AND DECOMPRESSION FOR RECONFIGURABLE COMPUTING SYSTEMS
M.D. Chekina2021-02-25Abstract ▼Fractal algorithms find an increasing number of areas of application - from computer
graphics to modeling complex physical processes, but their software implementation requires
significant computing power. Fractal image compression is characterized by a high degree of data
compression with good quality of the reconstructed image. The aim of this work is to improve the
performance of reconfigurable computing systems (RCS) when implementing fractal compression
and decompression of images. The paper describes the developed methods of fractal compression
and subsequent decompression of images, implemented in a parallel-pipeline method for RCS. Themain idea of parallel implementation of fractal image compression is reduced to parallel execution
of pairwise comparison of domain and rank blocks. For best performance, the maximum
number of pairs must be compared simultaneously. In the practical implementation of fractal image
compression on the DCS, such critical resources as the number of input channels and the
number of FPGA logical cells are taken into account. For the problem of fractal image compression,
data channels are a critical resource; therefore, the parallel organization of computations is
replaced by parallel-pipeline, after the performance reduction of the parallel computational structure
is performed. Each operand goes into the computational structure sequentially (bit by bit) to
save computational resources and reduce equipment downtime. To store the coefficients of the
iterated functions system encoding the image, a data structure has been introduced that specifies
the relation between the numbers of rank and domain blocks and the corresponding parameters.
For the convenience of subsequent decompression, the elements of the array encoding the compressed
image are ordered by the numbers of the rank blocks, which avoids double indirect addressing
in the computational structure. Applying this approach for parallel-pipeline programs
allows scaling computing structure to plurality programmable logic arrays (FPGAs). A practical
implementation performed on a reconfigurable computer Tertius-2 containing eight FPGAs provides
an acceleration of 15000 times compared to a universal multi-core processor and 18–25
times compared to existing solutions for FPGAs. The implementation of image decompression on a
reconfigurable computer shows an acceleration of 380 times in comparison with the similar implementation
for a multi-core general-purpose processor.








