IMPLEMENTATION OF A MATCHED FILTER IN THE FREQUENCY DOMAIN ON FPGA

Abstract

The use of filters matched to radio signals is quite common in radar, which helps to improve range resolution, as well as in communication systems and many other radio engineering systems, allowing you to increase the output signal-to-noise ratio (SNR). Designing digital devices on field programmable gate array (FPGA) allows us to configure them quite flexibly and create prototypes of radio engineering systems for further implementation of DSP algorithms, on applicationspecific integrated circuits (ASIC ), GPU, CPU, etc. FPGA digital devices are most used in low power mobile systems, while ASICs show the highest performance with high development costs. In this work, special attention is paid to the design and implementation of a filter matched to a complex chirp signal in the frequency domain on an FPGA using the Xilinx System Generator for DSP library of Matlab/Simulink. The results of the hardware-software model operation are presented in paper both for a single point object and for three point objects with different sampled delays. The dependence of the output on the input SNR for a linear and quadratic envelope detector is shown. The analytical curve SNROUT(SNRIN) is compared with the curve obtained using the developed hardware-software model implemented on the FPGA. The paper shows the benefits of using Xilinx System Generator for rapid prototyping of DSPs on FPGAs, and it provides an analysis of the used FPGA resources for the developed matched filter.