STRUCTURAL-TECHNOLOGICAL VERSION FOR VLSI BASED ON INJECTION FIELD LOGIC
Abstract
Currently, CMOS is the main element basis in the production of VLSI. VLSI production volumes at CMOS are growing. However, with all the advantages of CMOS-element base, it has a significant drawback-a thin sub-gate oxide, which reduces the percentage of yield and reliability of VLSI based on CMOS. The paper considers a topological variant of the structure of injection-field logic, which is de-void of the disadvantage of CMOS - thin oxide - and, in addition, allows to increase the density of the layout when using the same topological norms more than two times compared to CMOS-structure of approximately the same power consumption. A typical cell of an injection-field structure includes a normally closed field-effect transistor having an annular gate geometry with a drain in the center, and a bipolar p-n-p transistor of a horizontal design called an injector. In contrast to the ring geometry of the typical IPL structure, the proposed version uses a linear topology: in the gaps between rectangular gates there are drains that are the outputs of multi-input OR-NOT circuits. Logical schemes in the ap-plication of this topological structure can be built in the basis OR-NOT. On the basis of the analytical two-dimensional model calculates the injection-field structure: the dependence of the channel resistance and the width of the space charge of the gate in the open state of the applied voltage, the obtained values for the logical zero and one inverter. The proposed structural and technological version of the IPL-structure can be recommended for the creation of VLSI with higher reliability and degree of integration in comparison with CMOS VLSI.
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